FSM designer — draw it or table it, either way you get a real circuit.
Draw states and transitions on a visual state diagram editor, or fill in the transition table directly — LogicBench keeps both in sync and derives the excitation table and exact D, JK, or T flip-flop equations either way, for Mealy or Moore machines.
This is genuinely two-way, not a diagram tool with a table bolted on: build the state diagram and the transition table, excitation table, and flip-flop equations update automatically; start from the transition table instead and the state diagram redraws itself to match. That's the part of sequential design that's hardest to keep consistent by hand as you iterate. And the design doesn't stop at equations — the derived flip-flops build directly as real ICs in LogicBench's simulator, wired exactly as the excitation equations specify, so you can clock the machine through its states on an actual breadboard circuit and reuse it as a sub-circuit in a larger design.
4 steps, no signup.
Draw the state diagram or fill the table
Add states and transitions visually, or start directly from a transition table — either way works.
Watch both stay in sync
Editing the diagram updates the transition table automatically, and editing the table redraws the diagram.
Minimize and get excitation equations
Equivalent states are merged, and exact D, JK, or T flip-flop excitation equations are derived.
Build the real machine
The flip-flop equations build as actual ICs in the simulator, ready to clock through its states or reuse as a sub-circuit.
Solve it here, then wire it for real.
Every result in the Digital Logic Suite can be built directly in LogicBench’s simulator with real 74-series ICs — no retyping equations, no redrawing circuits by hand.
FAQ
What's the difference between a Mealy and a Moore state machine?
In a Moore machine, outputs depend only on the current state. In a Mealy machine, outputs depend on both the current state and the current inputs — which usually means a Mealy design needs fewer states for the same behavior, but reacts faster to input changes.
Can I design an FSM by drawing the state diagram instead of filling in a table?
Yes — the visual state diagram editor and the transition table are two views of the same design and stay in sync in both directions. Draw states and transitions, or edit the table directly, and the other view updates to match.
Does this FSM designer minimize states automatically?
Yes — it identifies equivalent states in your design and merges them, giving you the minimum-state version of your state machine alongside the original.
Which flip-flop types are supported for the excitation equations?
D, JK, and T flip-flops are all supported — choose one and the tool derives the correct excitation equations for that flip-flop type specifically.
Can I build the resulting FSM as a real, working circuit?
Yes — the derived flip-flop excitation equations build directly in LogicBench's simulator using real flip-flop and gate ICs on a breadboard, not just a diagram. The built machine can be extended or reused as a sub-circuit in a larger design.
The rest of the Digital Logic Suite.
K-Map Solver
Click cells or type an expression — get the minimized SOP, the algebraic proof, Quine-McCluskey steps, a truth table, a waveform, and a real gate-level circuit you can build with one click.
Circuit Diagram
The unsimplified and minimized gate-level schematics side by side, with exact term and gate counts — and a Build button that wires either one from real ICs in the simulator.
Truth Table Generator
The full truth table and a synced timing waveform, generated from the same expression as your K-Map, circuit, and Quine-McCluskey steps — no retyping between tools.