Circuit diagram generator — original and minimized, both buildable as real ICs.
Type an expression or pull it straight from the K-Map, and LogicBench draws the actual gate-level circuit — the original unsimplified version next to the minimized one, each labeled with its exact term and gate count.
Every gate is wired the way you'd draw it by hand for a DLD lab report: NOT gates on inverted inputs, AND/OR gates sized to their term count. But this isn't a static diagram — either the original or the minimized circuit has its own Build This Circuit button, which wires it from real 74-series ICs inside LogicBench's simulator, on a real breadboard, with real power and ground. Once built, the circuit isn't a dead end: you can extend it, probe it with the logic analyzer, or use it as a sub-circuit inside a larger design — the same way you'd reuse a verified block on a real bench.
4 steps, no signup.
Enter an expression
Type a Boolean expression or bring one over from the K-Map solver.
See both circuits, gate for gate
The original unsimplified schematic renders next to the minimized one, with term and gate counts for each.
Compare the exact cost
See precisely how many gates simplification saved, not just a general claim that it did.
Build either one as real ICs
Click Build This Circuit to wire it from real 74-series ICs — reusable as a sub-circuit in another design.
Solve it here, then wire it for real.
Every result in the Digital Logic Suite can be built directly in LogicBench’s simulator with real 74-series ICs — no retyping equations, no redrawing circuits by hand.
FAQ
How does LogicBench draw a circuit from a Boolean expression?
It parses the expression into AND, OR, and NOT gates matched to its structure, then lays them out left to right the way a hand-drawn DLD schematic would be — inputs on the left, inverters on inverted literals, gates sized to how many terms feed them.
Why does it show two circuits instead of one?
Seeing the original unsimplified circuit next to the minimized one, with exact gate counts for both, makes the point of simplification concrete — same output, a specific, visible reduction in gates.
Can I build the diagram as an actual working circuit, not just view it?
Yes — either the unsimplified or minimized circuit builds directly in LogicBench's simulator from real 74-series TTL ICs on a breadboard. It behaves like a physical circuit, so you can verify it before a lab practical.
Can I reuse a built circuit inside a larger design?
Yes — once a circuit is built in the simulator, it can be extended or used as a sub-circuit inside a bigger circuit, the same way you'd reuse a verified block on a real breadboard instead of rebuilding it from scratch.
The rest of the Digital Logic Suite.
K-Map Solver
Click cells or type an expression — get the minimized SOP, the algebraic proof, Quine-McCluskey steps, a truth table, a waveform, and a real gate-level circuit you can build with one click.
Truth Table Generator
The full truth table and a synced timing waveform, generated from the same expression as your K-Map, circuit, and Quine-McCluskey steps — no retyping between tools.
Boolean Algebra Simplifier
Every simplification step named — De Morgan's, absorption, consensus — as an algebraic proof alongside the same problem's K-Map grouping and Quine-McCluskey merge passes.