Karnaugh Map solver — minimize it, prove it, and build the real circuit.
Click cells to set 1, 0, or don't-care — or type a Boolean expression directly — and LogicBench lays out the full Karnaugh Map, groups the cells automatically (largest groups first, don't-cares included), and gives you the minimized sum-of-products expression.
That one input doesn't just give you a K-Map. The same expression drives a synced truth table and waveform, a step-by-step algebraic proof naming every law used, a full Quine-McCluskey tabulation as a second check on the grouping, and side-by-side unsimplified vs. minimized gate-level circuit diagrams with exact gate counts. Every one of those is a different view of the same answer, not a separate tool you retype into. And unlike a diagram-only solver, the minimized expression can be sent straight into LogicBench's simulator and built as a real circuit from actual 74-series TTL ICs on a breadboard — which you can then extend, probe with a logic analyzer, or drop into a bigger design as a reusable sub-circuit.

4 steps, no signup.
Pick your variables
Choose 2–6 variables and name them however your assignment does.
Fill the map or type an expression
Click cells to set 1, 0, or don't-care, paste a truth table, or type the expression directly.
See it grouped, proved, and cross-checked
Groupings, algebraic proof, and Quine-McCluskey steps all confirm the same minimized result.
Build the real circuit
One click wires the minimized expression as real 74-series ICs — reusable as a sub-circuit elsewhere.
Solve it here, then wire it for real.
Every result in the Digital Logic Suite can be built directly in LogicBench’s simulator with real 74-series ICs — no retyping equations, no redrawing circuits by hand.
FAQ
What is a Karnaugh Map used for?
A Karnaugh Map (K-Map) is a visual method for simplifying Boolean expressions by grouping adjacent 1s in a grid, so you can find the minimum sum-of-products form without algebraic manipulation.
How many variables can this K-Map solver handle?
2 through 6 variables, including don't-care conditions — enough for the vast majority of undergraduate digital logic design coursework.
Does it show more than just the final grouped map?
Yes — the same expression also generates a truth table, a timing waveform, a step-by-step algebraic simplification proof, and a full Quine-McCluskey tabulation, so you can check the K-Map result against a second, independent method.
Can I turn the result into a real, working circuit?
Yes — the minimized expression builds directly as a real circuit in LogicBench's simulator, using actual 74-series TTL ICs on a breadboard, not just a schematic. You can then extend it, wire it into a larger circuit, or reuse it as a sub-circuit.
Can I check original vs. simplified gate counts before building?
Yes — the connected Circuit Diagram view shows the unsimplified and minimized schematics side by side with exact gate counts for each, so you can see precisely what the minimization saved before you build either one.
The rest of the Digital Logic Suite.
Circuit Diagram
The unsimplified and minimized gate-level schematics side by side, with exact term and gate counts — and a Build button that wires either one from real ICs in the simulator.
Truth Table Generator
The full truth table and a synced timing waveform, generated from the same expression as your K-Map, circuit, and Quine-McCluskey steps — no retyping between tools.
Boolean Algebra Simplifier
Every simplification step named — De Morgan's, absorption, consensus — as an algebraic proof alongside the same problem's K-Map grouping and Quine-McCluskey merge passes.