Welcome to LogicBench
Build and simulate digital logic circuits in your browser.
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LogicBench
MI
Muhammad Ibrahim
Founder & Product Engineer
logicbench.support@gmail.com
+92 330 5618320
About LogicBench
A digital logic simulator featuring breadboards, gates, flip-flops, and real-time circuit simulation.
Found a bug?
Report it to LogicBench support via the email or phone above.
Design
Simulate
Logic analyzer
DLD Suite
6
New
Save
Load
Submit assignment
Take a tour
Background
Breadboard
Wire auto-routing
Export combinations
Canvas background
Blue Grey
Navy Dark
Breadboard style
White
Dark Grey
Wire auto-routing
Smart auto-routing
Clean U-shaped leads, avoids congestion. Off falls back to the classic router.
Circuit
Replace current circuit with file
Sub-circuit
Import as ghost — place anywhere
DIGITAL LOGIC SUITE — 6 TOOLS
K-Map Solver
Minimize Boolean expressions with Karnaugh Maps
Truth Table
Generate truth tables and signal waveforms
Algebraic Simplifier
Step-by-step simplification with Boolean laws
Quine-McCluskey
Tabular method for Boolean minimization
FSM Designer
States, transitions & flip-flop equations
Counter Designer
Binary, BCD, ring, Johnson & custom counters
Components
Tools
Select and drag
[S]
Multiselect
[M]
Note
[N]
Add text
[T]
Wires
Black Wire
[B]
Red Wire
[R]
Brown Wire
Amber Wire
Yellow Wire
Green Wire
Blue Wire
Purple Wire
Gray Wire
White Wire
Pink Wire
Teal Wire
Breadboard (Mini)
Breadboard (Half)
Breadboard (Full)
Breadboard (Double)
ICs
∧
AND (7408)
∨
OR (7432)
¬
NOT (7404)
¬
NOT/ST (7414)
⊼
NAND (7400)
⊼
NAND4 (7420)
⊼
NAND8 (7430)
⊽
NOR (7402)
⊻
XOR (7486)
⊙
XNOR (74266)
∧
AND3 (7411)
∧
AND4 (7421)
⊼
NAND3 (7410)
⊽
NOR3 (7427)
+
4-bit Adder (7483)
+
4-bit Adder (74283)
≶
4-bit Comparator (7485)
⑦
BCD-7Seg (7447)
⑦
BCD-7Seg (7448)
Tri-State Buffers
74125 Quad /OE-L
74126 Quad OE-H
74244 Octal Buf
74541 Octal Buf
74240 Oct Inv Buf
Decoders / Encoders / MUX
3-to-8 Dec (74138)
2×2-to-4 Dec (74139)
3-to-8 Dec Active-HIGH (74238)
BCD-to-Decimal Dec (7442)
▤
16x4 RAM (7489)
⊞
8:1 MUX (74151)
⊞
2×4:1 MUX (74153)
⊞
4×2:1 MUX (74157)
⊞
4×2:1 MUX Inv (74158)
8-to-3 Enc (74148)
Shift registers and counters
Shift Reg (74194)
PISO Shift Reg (74165)
SIPO Shift Reg (74595)
Up/Dn Counter (74193)
Decade Counter (7490)
Binary Counter (7493)
Decade Counter (4017)
Bus Interface
Octal Bus (74245)
⊡
Octal Latch (74373)
⊡
Octal D-FF (74273)
⊡
Octal D-FF 3-State (74574)
Flip-Flops & Timing
SR Flip-Flop
D Flip-Flop
D-FF (7474)
JK-FF (7476)
JK-FF (7473)
JK-FF (74112)
Quad D-FF (74175)
Dual D-FF CMOS (4013)
Quad SR Latch (74279)
555 Timer (IC)
Inputs
⊙
Toggle Switch
Clock
Switch (2-terminal)
⬤
Push Button
Push Button (4-pin)
Keypad (4x4 Matrix)
⊞
DIP Switch (4-bit)
⊞
DIP Switch (8-bit)
Outputs
LED (Red)
LED (Green)
LED (Yellow)
LED (Blue)
LED (White)
⿸
7-Seg Display
▦
5x7 LED Matrix
▬
Light Bar (7-LED)
▬
Light Bar (8-LED)
Buzzer
Sensors
IR Break-Beam TX
IR Break-Beam RX
IR Obstacle Avoidance
Test obstacle (drag to test)
HC-SR04 Ultrasonic
DHT11 Temp/Humidity
DHT22 Temp/Humidity
BMP280 Pressure Sensor
LDR Light Sensor (LM393)
MQ-2 Gas/Smoke Sensor
Soil Moisture Sensor (YL-69)
Soil patch (drag to test)
DS3231 RTC Module
Microcontrollers
Arduino Uno
Displays
16x2 I2C Display
16x2 Display
16x4 Display
Power
Regulated +5V Power
9V Battery
1.5V Battery
Custom battery…
⏚
Ground (GND)
Resistors, Caps & Inductors
Ω
Resistor (1kΩ)
Ω
Resistor (220Ω)
Ω
Resistor (10kΩ)
Ω
Resistor (100Ω)
Ω
Resistor (4.7kΩ)
Ω
Custom resistor…
⊣⊢
Cap (100µF)
⊣⊢
Cap (47µF)
⊣⊢
Cap (10µF)
⊣⊢
Cap (1µF)
⊣⊢
Cap (470µF)
⊣⊢
Cap (1000µF)
⊣⊢
Custom capacitor…
⏢
Inductor (10mH)
⏢
Inductor (100µH)
⏢
Inductor (1mH)
⏢
Inductor (100mH)
⏢
Inductor (1H)
⏢
Custom inductor…
▷|
Diode (1N4001 Rectifier)
▷|
Diode (1N4148 Signal)
Transistor NPN (BC547)
LogicBench — Free Online Digital Logic Circuit Simulator
LogicBench digital logic circuit simulator. Simulate 74xx TTL ICs, Arduino Uno C++ sketches, 555 Timer, breadboard, LEDs, and real-time logic propagation — free, browser-based, no download.
Logic
Bench
DIGITAL LOGIC SIMULATOR
Welcome to LogicBench
DESIGN
Exporting combinations…
Simulating every input state and capturing screenshots
0 / 0 combinations
Capacitor added
Caps
hold charge
when floating — to discharge, wire a resistor as a bleed path:
A
Resistor across both cap legs
(Cap+ → R → Cap−)
B
Resistor from Cap+ → GND component
Logic Analyzer
Add
Run
Live
−
1.0 s/div
+
⋯
Screenshot time range…
No signals yet — click
Add signal
, then click any wire or pin in the circuit.